ju ne 2010 ?2010 fairchild semiconductor corporation FDMC7664 rev.c2 www.fairchildsemi.com 1 FDMC7664 n-channel powertrench ? mosfet FDMC7664 n-channel powertrench ? mosfet 30 v, 18.8 a, 4.2 m : features ? max r ds(o n) = 4. 2 m : at v gs = 10 v , i d = 18.8 a ? max r ds(on) = 5. 5 m : at v gs = 4.5 v , i d = 16.1 a ? high perfo rmance technology for extremely low r ds(o n) ? t ermination is lead-free and rohs compliant ge neral description this n-channel mosfet is produced using fairchild semiconductors advanced power trench ? proce ss that has been especially tailored to minimize the on-state resistance. this device is well suited for power management and load switching applications common in notebook computers and portable battery packs. applications ? dc - dc buck converters ? notebook battery power management ? load switch in notebook g s s s d d d d 5 6 7 8 3 2 1 4 top mlp 3.3x3.3 bottom d d d s s s g pin 1 d mosfet maximum ratings t a = 25 c u nless otherwise noted thermal characteristics packag e marking and ordering information symbol parameter ratings units v ds d rain to source voltage 30 v v gs gate to sou rce voltage 20 v i d d rain current -continuous (package limited) t c = 25 c 24 a -continuous t a = 25 c (note 1a) 18.8 -pulsed 60 e as s ingle pulse avalanche energy (note 3) 188 mj p d pow er dissipation t c = 25 c 42 w power dissipation t a = 25 c (note 1a) 2.3 t j , t stg oper ating and storage junction temperature range -55 to +150 c r t jc t hermal resistance, junction to case 3.0 c/w r t ja thermal resistance, junction to ambient (note 1a) 53 device marking device package reel size tape width quantity FDMC7664 FDMC7664 mlp 3.3x3.3 13 12 mm 3000 units
www.fairchildsemi.com 2 ?2010 fairchild semiconductor corporation FDMC7664 rev.c2 FDMC7664 n-channel powertrench ? mosfet electrical characteristics t j = 25 c unless otherwise noted off characteristics on characteristics dynamic characteristics switching characteristics drain-source diode characteristics symbol parameter test conditions min typ max units bv dss drain to source breakdown voltage i d = 250 p a, v gs = 0 v 30 v ' bv dss ' t j breakdown voltage temperature coefficient i d = 250 p a, referenced to 25 c 12 mv / c i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v 1 p a t j = 125 c 250 i gss gate to source leakage current, forward v gs = 20 v, v ds = 0 v 100 na v gs(th) gate to source threshold voltage v gs = v ds , i d = 250 p a 1.0 1.9 3.0 v ' v gs(th) ' t j gate to source threshold voltage temperature coefficient i d = 250 p a, referenced to 25 c -7 mv/c r ds(on) static drain to source on resistance v gs = 10 v, i d = 18.8 a 3.6 4.2 m : v gs = 4.5 v, i d = 16.1 a 4.5 5.5 v gs = 10 v, i d = 18.8 a t j = 125 c 4.4 5.4 g fs forward transconductance v dd = 5 v, i d = 18.8 a 115 s c iss input capacitance v ds = 15 v, v gs = 0 v f = 1 mhz 3655 4865 pf c oss output capacitance 1100 1465 pf c rss reverse transfer capacitance 115 170 pf r g gate resistance 0.8 2.2 : t d(on) turn-on delay time v dd = 15 v, i d = 18.8 a v gs = 10 v, r gen = 6 : 15 27 ns t r rise time 714ns t d(off) turn-off delay time 37 59 ns t f fall time 612ns q g(tot) total gate charge v gs = 0 v to 10 v v dd = 15 v i d = 18.8 a 55 76 nc q g total gate charge v gs = 0 v to 4.5 v 25 34 nc q gs gate to source charge 12 nc q gd gate to drain miller charge 6 nc v sd source to drain diode forward voltage v gs = 0 v, i s = 18.8 a (note 2) 0.83 1.2 v v gs = 0 v, i s = 1.9 a (note 2) 0.71 1.2 t rr reverse recovery time i f = 18.8 a, di/dt = 100 a/ p s 41 65 ns q rr reverse recovery charge 20 35 nc notes: 1. r t ja is determined with the device mounted on a 1 in 2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of fr-4 material. r t jc is guaranteed by design while r t ca is determined by the user's board design. 2. pulse test: pulse width < 30 0 p s, duty cycle < 2.0 %. 3. e as of 188 mj is based on starting t j = 25 o c, l = 1 mh, i as = 19.4 a, v dd = 27 v, v gs = 10 v. a. 53 c/w when mounted on a 1 i n 2 p a d o f 2 o z c o p p e r b.125 c/w when mounted on a minimum pad of 2 oz copper
www.fairchildsemi.com 3 ?2010 fairchild semiconductor corporation FDMC7664 rev.c2 FDMC7664 n-channel powertrench ? mosfet typical characteristics t j = 25 c unless otherwise noted figure 1. 0.0 0.3 0.6 0.9 1.2 0 15 30 45 60 v gs = 6 v v gs = 3.5 v v gs = 4.5 v pulse duration = 80 p s duty cycle = 0.5% max v gs = 4 v v gs = 3 v v gs = 10 v i d , drain current (a) v ds , drain to source voltage (v) on region characteristics figure 2. 0 15304560 0 1 2 3 4 5 v gs = 6 v v gs = 3.5 v pulse duration = 80 p s duty cycle = 0.5% max normalized drain to source on-resistance i d , drain current (a) v gs =4 v v gs = 4.5 v v gs = 3 v v gs =10 v n o r m a l i z e d o n - r e s i s t a n c e vs drain current and gate voltage f i g u r e 3 . n o r m a l i z e d o n r e s i s t a n c e -75 -50 -25 0 25 50 75 100 125 150 0.6 0.8 1.0 1.2 1.4 1.6 i d = 18.8 a v gs = 10 v normalized drain to source on-resistance t j , junction temperature ( o c ) vs junction temperature figure 4. 246810 0 3 6 9 12 t j = 125 o c i d = 18.8 a t j = 25 o c v gs , gate to source voltage (v) r ds(on) , drain to source on-resistance ( m : ) pulse duration = 80 p s duty cycle = 0.5% max o n - r e s i s t a n c e v s g a t e t o source voltage figure 5. transfer characteristics 1234 0 15 30 45 60 t j = 150 o c v ds = 5 v pulse duration = 80 p s duty cycle = 0.5% max t j = -55 o c t j = 25 o c i d , drain current (a) v gs , gate to source voltage (v) figure 6. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 0.001 0.01 0.1 1 10 100 t j = -55 o c t j = 25 o c t j = 150 o c v gs = 0 v i s , reverse drain current (a) v sd , body diode forward voltage (v) s o u r c e t o d r a i n d i o d e forward voltage vs source current
www.fairchildsemi.com 4 ?2010 fairchild semiconductor corporation FDMC7664 rev.c2 FDMC7664 n-channel powertrench ? mosfet figure 7. 0 15304560 0 2 4 6 8 10 i d = 18.8 a v dd = 20 v v dd = 10 v v gs , gate to source voltage (v) q g , gate charge (nc) v dd = 15 v gate charge characteristics figure 8. 0.1 1 10 50 100 1000 7000 f = 1 mhz v gs = 0 v capacitance (pf) v ds , drain to source voltage (v) c rss c oss c iss 30 c a p a c i t a n c e v s d r a i n to source voltage figure 9. 0.01 0.1 1 10 100 1000 1 10 30 t j = 100 o c t j = 25 o c t j = 125 o c t av , time in avalanche (ms) i as , avalanche current (a) u n c l a m p e d i n d u c t i v e switching capability figure 10. 25 50 75 100 125 150 0 10 20 30 40 50 60 70 80 90 v gs = 4.5 v limited by package r t jc = 3.0 o c/w v gs = 10 v i d , drain current (a) t c , case temperature ( o c ) m a x i m u m c o n t i n u o u s d r a i n current vs case temperature f i g u r e 1 1 . f o r w a r d b i a s s a f e operating area 0.01 0.1 1 10 100 0.01 0.1 1 10 100 10 ms 100 us dc 1 s 10 s 100 ms 1 ms i d , drain current (a) v ds , drain to source voltage (v) this area is limited by r ds(on) single pulse t j = max rated r t ja = 125 o c/w t c = 25 o c 200 figure 12. 10 -4 10 -3 10 -2 10 -1 11010 2 10 3 0.5 1 10 100 1000 2000 single pulse r t ja = 125 o c/w t c = 25 o c v gs = 10 v p ( pk ) , peak transient power (w) t, pulse width (sec) s i n g l e p u l s e m a x i m u m power dissipation typical characteristics t j = 25 c unless otherwise noted
www.fairchildsemi.com 5 ?2010 fairchild semiconductor corporation FDMC7664 rev.c2 FDMC7664 n-channel powertrench ? mosfet figure 13. 10 -4 10 -3 10 -2 10 -1 110 100 1000 0.0005 0.001 0.01 0.1 1 single pulse r t ja = 125 o c/w ( note 1b ) duty cycle-descending order normalized thermal impedance, z t ja t, rectangular pulse duration (sec) d = 0.5 0.2 0.1 0.05 0.02 0.01 2 p dm t 1 t 2 notes: duty factor: d = t 1 /t 2 peak t j = p dm x z t ja x r t ja + t a junction-to-ambient transient thermal response curve typical characteristics t j = 25 c unless otherwise noted
www.fairchildsemi.com 6 ?2010 fairchild semiconductor corporation FDMC7664 rev.c2 FDMC7664 n-channel powertrench ? mosfet b. dimensions are in millimeters. c. dimensions and tolerances per a. does not conform to jedec registration mo-229 asme y14.5m, 1994 0.10 cab 0.05 c top view bottom view recommended land pattern 0.10 c 0.08 c b a 3.30 3.30 0.05 0.00 0.10 c 2x 2x 0.8 max side view seating plane 0.10 c pin #1 ident (0.203) 8 5 1.95 0.65 d. drawing file name : mlp08sreva pin#1 quadrant 0.40 0.30 4 1 (8x) e. land pattern recommendation is based on fsc design only 2.32 2.22 0.55 0.45 (4x) 1.150 0.299 2.05 1.95 0.350 r0.150 0.785 dimensional outline and pad layout
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